VERIFICATION, VALIDATION & ACCREDITATION/ACCEPTANCE (VV&A) PRODUCTS PDG

The PDG is developing IEEE 1730.2 Distributed Simulation Engineering and Execution Process (DSEEP) Verification and Validation (V&V) Overlay.  The V&V Overlay has been designed to apply across a wide range of functional applications. The purpose of this overlay is to provide a more detailed view of the V&V processes implied by the DSEEP. Currently, these processes represent the best practices available to the VV&A community. The V&V Overlay is a tailorable process and is offered as guidance to all participants in DSEEP activities.  This recommended practice provides a higher-level framework into which V&V  practices can be integrated and tailored for specific uses. The V&V Overlay provides implementation level guidance to V&V practitioners; however, it does not describe the individual techniques that might be employed to execute the V&V processes for distributed simulations.

If you would like to join the VV&A PDG, please fill out the AFFILIATION DATA FORM below and subscribe to the PDG’s discussion forum (SAC-PDG-VVA-Products). 

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Leadership

Co-Chair:

Axel Lehmann
University of Bundeswehr

Co-Chair:

Simone Youngblood
JHU/APL

Vice Chair:

Jose Ruiz
DGA (FR MOD)

Secretary:

Kathy Ruben
JHU/APL

Technical Activity Director (TAD):

Kathy Ruben
JHU/APL